Scientists at the Stanford University and the Massachusetts Institute of Technology have developed a new type of 3D computer chip that combines two cutting-edge nanotechnologies.
Today’s computer chips separate memory, logic circuits, and data back and forth between these two components to carry out operations. But because of a limited number of connections between memory and logic circuits. Due to this many computers are expected to deal with ever-increasing amounts of data.
This 3D computer chip tackles this problem by layering memory and logic circuits on top of each other, rather than side by side. It also makes use of space efficiently and dramatically increases the surface area for connections between the components.
There is a conventional logic circuit that allows pinning a limited number of connections on each edge to transfer data. Here, researchers were not restricted to using edges and were able to densely pack vertical wires running from the logic layer to the memory layer.
Study leader Subhasish Mitra, a professor of electrical engineering and computer science at Stanford said, “With separate memory and computing, a chip is almost like two very populous cities, but there are very few bridges between them. Now, we’ve not just bought these two cities together, we’ve built many more bridges so traffic can go much more efficiently between them.”
On the top of the chip, scientists placed logic circuits constructed from carbon nanotube transistors, along with an emerging technology called resistive random-access memory (RRAM). This was essential because the huge energy needed to run data centers constitutes another major challenge facing technology companies.
Through this architecture, scientists get 1,000-times improvement in computing performance in terms of energy efficiency. Both carbon nanotube transistors and RRAM are fabricated at cooler than 392 degrees F (200 degrees C). This allowed scientists to easily layered on top of silicon without damaging the underlying circuitry. This also makes the researchers’ approach compatible with the current chip-making technology.
To find benefits of this 3D computer chip, the team built a prototype gas detector by adding another layer of carbon nanotube-based sensors on top of the chip. The vertical integration meant that each of these sensors was directly connected to an RRAM cell, dramatically increasing the rate at which data could be processed.
Professor Jan Rabaey said, “These structures may be particularly suited for alternative learning-based computational paradigms such as brain-inspired systems and deep neural nets, and the approach presented by the authors is definitely a great first step in that direction.”